Home Past Issues June 2014

June 2014

Article- 05080

MODELING OF A LOW-NOISE CHOPPER AMPLIFIER FOR USE IN AN INTEGRATED BIOMEDICAL CHIP

AYESHA TABASSUM.N ,CHIRAG SHARMA

Article- 06106

DESIGN OF BRAUN’S MULTIPLIER USING HAN CARLSON AND LADNER FISCHER ADDERS

CHETHAN BR, NATARAJ KR

Article- 05079

MODELING AND DESIGN OF A CMOS LOW DROP-OUT (LDO) VOLTAGE REGULATOR

PRIYADARSHINI JAINAPUR, CHIRAG SHARMA

Article- 03044

AN EFFICIENT 64-BIT CARRY SELECT ADDER WITH REDUCED AREA APPLICATION

CH. PALLAVI, V.SWATHI

Article- 05094

DESIGN OF MODIFIED BOOTH ENCODER MULTIPLIER FOR SIGNED AND UNSIGNED NUMBERS

C.PADMA, Y.MAHESH

Article- 06104

FPGA IMPLEMENTATION OF ELLIPTICAL CURVE CRYPTOGRAPHY USING MIXED COORDINATES

T.VINAY, A.S. RANJITHA

Article- 06102

STUDY THE PERFORMANCE ANALYSIS OF LOW POWER–HIGH SPEED CARRY SELECT ADDER USING EDA SIMULATION TOOL

M. BASAK, M. SUTRADHAR, B. SANTRA, M. SAHA, D. CHOWDHURY, J. SAMANTA

Article- 06103

REAL TIME EDGE DETECTION MODELLING WITH FPGA

B.MURALIKRISHNA, P.SUJITHA, HABIBULLA KHAN

Article- 06107

DESIGN OF HYSTERETIC CMOS COMPARATOR FOR AUDIO AMPLIFIER USING 180nm TECHNOLOGY

UTTAM KUMAR TEMBHURNE, RAJESH KHATRI

Article- 05090

IMPLEMENTATION OF AES ALGORITHM USING VERILOG

GIREESH KUMAR P, P. MAHESH KUMAR

Article- 06111

VLSI DESIGN OF 16-BIT PROCESSOR

RAHUL R.BALWAIK, YOGESH M.JAIN, AMUTHA JEYAKUMAR

Article- 06121

FPGA IMPLEMENTATION OF MICRO-ROTATION SELECTION ALGORITHM FOR EFFICIENT CORDIC ARCHITECTURE
HEMANT DIWAN, SHILPA K. GOWDA

Article- 06116

NOC: DESIGN AND IMPLEMENTATION OF HARDWARE NETWORK INTERFACE WITH IMPROVED COMMUNICATION RELIABILITY

RAJESH B V, SHIVAPUTRA

Article- 06108

REDUCTION OF LEAKAGE POWER IN CMOS MUX USING LEAKAGE CONTROL TRANSISTOR IN 90nm TECHNOLOGY

RAMBABU KUSUMA, A CHOUBEY, GUGULOTH SREEKANTH

Article- 05099

Removed due to Plagiarism issues